View 74F1604_23381.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

INTEGRATED CIRCUITS
74F1604 Latch
Product specification IC15 Data Handbook 1990 Oct 04
Philips Semiconductors
Philips Semiconductors
Product specification
Latch
74F1604
FEATURES
* High impedance NPN base inputs for reduced loading
(20A in high and low state) * Stores 16-bit wide data inputs, multiplexed 8-bit outputs
PIN CONFIGURATION
LE 1 SELECT A/B 2 A0 3 B0 4 A1 5 B1 6 28 V CC 27 A4 26 B4 25 A5 24 B5 23 A6 22 B6 21 A7 20 B7 19 Q7 18 Q6 17 Q5 16 Q4 15 Q
* Propagation delay 7.0ns typical * Power supply current 70mA typical
DESCRIPTION
A2 7 B2 8 A3 9 B3 10 Q3 11 Q2 12 Q1 13 GND 14
The 74F1604 is a dual octal transparent latch. Organized as 8-bit A and B latches, the latch outputs are connected by pairs to eight 2-input multiplexers. A select (SELECT A/B) input determines whether the A or B latch contents are multiplexed to the eight outputs. Data from the B inputs are selected when SELECT A/B is low; data from the A inputs are selected when SELECT A/B is high. Data enters the latch on the falling edge of the latch enable (LE) input. The latch remains transparent to the data inputs while LE is low, and stores the data that is present one setup time before the low-to-high latch enable transition. TYPICAL PROPAGATION DELAY 7.0ns TYPICAL SUPPLY CURRENT (TOTAL) 70mA
SF00553
TYPE 74F1604
LOGIC SYMBOL
34 5 6 7 8 9 10 27 26 25 24 2322 21 20
ORDERING INFORMATION
ORDER CODE DESCRIPTION COMMERCIAL RANGE VCC = 5V 10%, Tamb = 0C to +70C 28-pin plastic DIP 28-pin plastic SOL N74F1604N N74F1604D SOT117-2 SOT136-1
VCC = Pin 28 GND = Pin 14 15 13 12 11 16 17 18 19 A0 B0 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6B6A7 B7
PKG DWG #
1 2
LE SELCT A/B
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS A0 - A7 B0 - B7 SELECT A/B LE Q0 - Q7 DESCRIPTION Data inputs Data inputs Select input Latch enable input (active low) Data outputs 74F (U.L.) HIGH/LOW 1.0/0.033 1.0/0.033 1.0/0.033 1.0/0.033 50/33 LOAD VALUE HIGH/LOW 20A/20A 20A/20A 20A/20A 20A/20A 1.0mA/20mA
SF00554
IEC/IEEE SYMBOL
2 1 G2 C1 1D 2 1D 2 1
3 4 5 6 7 8 9 10 27 26 25 24 23 22 21 20
15 13 12 11 16 17 18 19
Note to input and output loading and fan out table One (1.0) FAST unit load is defined as: 20A in the high state and 0.6mA in the low state.
SF00555
October 4, 1990
2
853 0088 00619
Philips Semiconductors
Product specification
Latch
74F1604
LOGIC DIAGRAM
2 SELECT A/B 1 LE
3 A0 4 B0 5 A1 6 B1 D E 7 A2 8 B2 9 A3 10 B3 27 A4 26 B4 25 A5 24 B5 D E 23 A6 22 B6 21 A7 20 B7 VCC = Pin 28 GND = Pin 14 D E Q D E Q Q D E Q D E Q D E Q Q D E Q
D E
Q 15 Q0
D E
Q 13 Q1
D E
Q 12 Q2
D E
Q 11 Q3
D E
Q 16 Q4
D E
Q 17 Q5
D E
Q 18 Q6
D E
Q 19 Q7
SF00556
FUNCTION TABLE
INPUTS OPERATING MODE A0 - A7 A data A data X A data B0 -B7 B data B data X B data SELECT A/B L H X l LE L L H Q0 - Q7 B data A data NC B data Hold Enable and read register OUTPUTS OUTPUTS
Latch and read register A data B data h A data Notes to function table H = High-voltage level h = High-voltage level one setup time before the low-to-high latch enable transition L = Low-voltage level l = Low-voltage level one setup time before the low-to-high latch enable transition NC= No change ( If SELECT A/B is toggled and the A latched data is different from B latched data then the output will change accordingly.) X = Don't care = Low-to-high latch enable transition
October 4, 1990
3
Philips Semiconductors
Product specification
Latch
74F1604
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in high output state Current applied to output in low output state Operating free air temperature range Storage temperature range PARAMETER RATING -0.5 to +7.0 -0.5 to +7.0 -30 to +5 -0.5 to VCC 40 0 to +70 -65 to +150 UNIT V V mA V mA
C C
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER MIN VCC VIH VIL IIk IOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current Operating free air temperature range 0 4.5 2.0 0.8 -18 -1 20 +70 LIMITS NOM 5.0 MAX 5.5 V V V mA mA mA UNIT
C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS1 IOH = -1mA VOH High-level output voltage VCC = MIN, VIL = MAX, VIH = MIN IOH = -3mA 10%VCC 5%VCC 10%VCC 5%VCC VOL VIK II IIH IIL IOS ICC Low-level output voltage VCC = MIN, VIL = MAX, VIH = MIN Input clamp voltage Input current at maximum input voltage High-level input current Low-level input current Short-circuit output current3 Supply current (total) ICCH VCC = MIN, II = IIK VCC = MAX, VI = 7.0V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.5V VCC = MAX VCC = MAX -60 60 IOL = MAX 10%VCC 5%VCC MIN 2.5 2.7 2.4 2.7 3.3 0.30 0.30 -0.73 0.50 0.50 -1.2 100 20 -20 -150 80 3.4 LIMITS TYP2 MAX V V V V V V V A A A mA mA UNIT
ICCL 75 100 mA Notes to DC electrical characteristics 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. October 4, 1990 4
Philips Semiconductors
Product specification
Latch
74F1604
AC ELECTRICAL CHARACTERISTICS
LIMITS Tamb = +25C SYMBOL PARAMETER TEST CONDITION VCC = +5.0V CL = 50pF, RL = 500 MIN tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Propagation delay SELECT A/B to Qn (non-inverting) Propagation delay SELECT A/B to Qn (inverting) Propagation delay LE to Qn Propagation delay An or Bn to Qn Waveform 2 Waveform 1 Waveform 3 Waveform 1, 2 3.0 3.5 4.0 2.5 6.5 6.0 4.0 4.0 TYP 5.5 6.5 7.0 4.5 9.5 9.0 6.5 7.0 MAX 8.5 10.0 10.5 7.5 13.0 12.5 9.5 10.5 VCC = +5.0V 10% CL = 50pF, R = 500 MIN 2.5 3.0 3.5 2.0 5.5 5.0 3.5 3.5 MAX 9.0 11.5 12.0 8.0 15.0 14.0 10.5 12.5 ns ns ns ns Tamb = 0C to +70C UNIT
AC SETUP REQUIREMENTS
LIMITS Tamb = +25C SYMBOL PARAMETER TEST CONDITION VCC = +5.0V CD = 50pF, RL = 500 MIN tsu (H) tsu (L) th (H) th (L) tw (L) Setup time, high or low An, Bn to LE Hold time, high or low An, Bn to LE LE Pulse width, low Waveform 4 Waveform 4 Waveform 4 0.0 1.0 1.5 3.0 6.5 TYP MAX VCC = +5.0V 10% CD= 50pF, RL = 500 MIN 0.0 3.5 2.0 3.5 7.5 MAX ns ns ns Tamb = 0C to +70C UNIT
AC WAVEFORMS
An, Bn, SELCET A/B VM tPHL Qn VM VM tPLH VM LE VM VM VM
tPHL VM
tPLH VM
Qn
SF00557
SF00559
Waveform 1. Propagation delay for SELECT A/B to output (A register stored data = low) or An. Bn to output
Waveform 3. Propagation delay for latch enable to output
An, Bn, SELCET A/B
VM tPHL VM
VM tPLH VM
An, Bn
VM tsu(H)
VM th(H)
VM tsu(L)
VM th(L) VM
LE
VM
Qn
SF00560 SF00558
Waveform 4. Setup time and hold times and LE pulse width Waveform 2. Propagation delay for SELECT A/B to output (A register stored data = low) or An. Bn to output Note to AC waveforms For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance.
October 4, 1990
5
Philips Semiconductors
Product specification
Latch
74F1604
TEST CIRCUIT AND WAVEFORMS
VCC NEGATIVE PULSE VIN PULSE GENERATOR RT D.U.T. VOUT 90% VM 10% tTHL (tf ) CL RL tw VM 10% tTLH (tr ) 0V 90% AMP (V)
tTLH (tr ) 90% POSITIVE PULSE VM 10% tw
tTHL (tf ) AMP (V) 90% VM 10% 0V
Test Circuit for Totem-Pole Outputs DEFINITIONS: RL = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tTHL 2.5ns
SF00006
October 4, 1990
6
Philips Semiconductors
Product specification
Latch
74F1604
DIP28: plastic dual in-line package; 28 leads (600 mil); long body
SOT117-2
1990 Oct 04
7
Philips Semiconductors
Product specification
Latch
74F1604
SO28: plastic small outline package; 28 leads; body width 7.5mm
SOT136-1
1990 Oct 04
8
Philips Semiconductors
Product specification
Latch
74F1604
NOTES
1990 Oct 04
9
Philips Semiconductors
Product specification
Latch
74F1604
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 10-98 9397-750-05194
Philips Semiconductors
yyyy mmm dd 10

▲Up To Search▲

Price & Availability of 74F1604

	To Download 74F1604 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .